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Panchapakeshan, P.; and Vijayakumar, P.; and Narayanan, P.; and Chui, C.O.; and Moritz, C. A.. (2011) 3-D Integration requirements for Hybrid Nanoscale-CMOS Fabrics. In: Nanotechnology (NANO), 2011 IEEE/Nano International Conference on Nanotechnology.
Rahman, M.; and Narayanan, P.; and Moritz, C. A.. (2011) N3ASIC Based Nanowire Volatile RAM. In: Nanotechnology (NANO), 2011 IEEE/Nano International Conference on.