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Narayanan, Pritish and Leuchtenburg, Michael and Kina, Jorge and Joshi, Prachi and Panchapakeshan, Pavan and Chui, Chi On and Moritz, C. Andras. (2010) Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration. In: Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on.

Narayanan, Pritish and Moritz, Csaba Andras and Park, Kyoung Won and Chui, Chi On. (2009) Validating cascading of crossbar circuits with an integrated device-circuit exploration. In: Nanoscale Architectures, 2009. NANOARCH '09. IEEE/ACM International Symposium on.