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Narayanan, P. ;. and Leuchtenburg, M. ;. and Kina, J. ;. and Joshi, P. ;. and Panchapakeshan, P. and Chui, C. O. and Moritz, C. A.. (2013) Variability in Nanoscale Architectures: Bottom-Up Integrated Analysis and Mitigation. ACM Journal on Emerging Technologies in Computing Systems, 9 (1). (In-Press).
Narayanan, P. and Leuchtenburg, M. and Kina, J. and Joshi, P. and Panchapakeshan, P. and Chui, C. O. and Moritz, C. A.. (2013) Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation. ACM Journal on Emerging Technologies in Computing Systems, 9 (1).
Khan, M. M. U. and Narayanan, P. and Joshi, P. and Panchapakeshan, P. and Moritz, C. A.. (2012) FastTrack: Toward Nanoscale Fault Masking With High Performance. Nanotechnology, IEEE Transactions on, 11 (4). pp. 720-730.
Narayanan, P. and Kina, J. and Panchapakeshan, P. and Chui, C. O. and Moritz, C. A.. (2012) Integrated Device-Fabric Explorations and Noise Impact and Mitigation in Nanoscale Fabrics. Nanotechnology, IEEE Transactions on, 11 (4). pp. 687-700.
Panchapakeshan, P. and Vijayakumar, P. and Narayanan, P. and Chui, C. O. and Koren, I. and Moritz, C. A.. (2011) 3-D integration requirements for hybrid nanoscale-CMOS fabrics. Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on. pp. 849-853.
Narayanan, P. and Panchapakeshan, P. and Kina, J. and Chi On, Chui and Moritz, C. A.. (2011) Integrated nanosystems with junctionless crossed nanowire transistors. Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on. pp. 845-848.
Panchapakeshan, P. and Narayanan, P. and Moritz, C. A.. (2011) N3ASIC: Designing nanofabrics with fine-grained CMOS integration. In: Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on Nanoscale Architectures.
Narayanan, P. and Kina, J. and Panchapakeshan, P. and Vijayakumar, P. and Kyeong-Sik, Shin and Rahman, M. and Leuchtenburg, M. and Koren, I. and Chi On, Chui and Moritz, C. A.. (2011) Nanoscale Application Specific Integrated Circuits. In: Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on Nanoscale Architectures.
